RV-VLSI Design Center

RTL Design Engineer

Proficient in Verilog/VHDL RTL design and simulation.
Good knowledge of Xilinx/Altera FPGA architectures.
Must have implemented and tested at least 3-4 designs on FPGA boards.
Very good knowledge of board interfaces like RS232, USB, I2C, LCD, RJ45, keyboards.
Hands on experience on EDA tools, Modelsim/VCS, Xilinx ISE, Altera Quartus, Chipscope-pro.
Should be able to work independently.

Qualifications: At least 1-2 years of FPGA design and implementation experience.
B.E/B.Tech in Electronics/Electronic Communications

Manager – Business Development

This job requires extensive travel in the city and less frequent travel out of state.
Will work in building contacts and drive sales in the form or corporate training to industry.
The ideal candidate will have worked in the EDA/VLSI industry for three years with a proven track record of bringing in sales.
Your innovative strategies in growing business will be well rewarded at RV-VLSI.
The right candidate will have a BE in E&CE with an MBA.

Manager, Physical Design


You will be part of a core team of dedicated professionals committed to redefine VLSI training and raise the standards for professional training in VLSI. Your experience in ASIC design across a wide technology will help create a new breed of professionals who will be industry ready. You will be proactive and work closely with the core team, industry professionals and experts from academia in designing the contents and identifying research areas.

Experience

Minimum 6 to 8 years of ASIC physical design experience. Must have hands on experience taping out chips in nanometer technologies. Experience in managing a team of 20 engineers. Excellent problem solving, mentoring and people skills. Strong Back ground of logic design fundamentals, block and chip level Floor planning, power analysis, CTS, P&R , timing and Signal Integrity closure, DFT, STA, fullchip physical verification and extraction. Scripting Language with PERL, TCL, AWK, shell scripting is essential. Expert user of industry standard backend tools and timing analysis tools is a requirement. Exposure to Synthesis flow is a big plus.

Qualifications

BE/BTech in EE and or ME/MTech in Electronics and related branches Phd is added bonus. Good understanding of the complete ASIC flow from concept to gds is a major plus Well versed in Perl/Tcl and Unix / Linux Published papers in international conferences and journals Participated in learning and development activities at work. Energetic and excellent communication skills.

Location: Bangalore Email: info@rv-vlsi.com with Job Title in subject line.
Interested in working at RV-VLSI - Upload Resume

Lead, ASIC Verification Engineer


You will be part of a core team of dedicated professionals committed to redefine VLSI training and raise the standards for professional training in VLSI. Your experience in ASIC design and verification will help create a new breed of professionals who will be industry ready. You will be proactive and work closely with the core team of industry professionals and experts from academia in designing the contents and identifying research areas. Design and create verification environments for module level and system level Create and execute test-plans, test cases. Come up with innovative verification solutions.

Experience

6+ years experience in SOC/ASIC Verification with a solid knowledge of Verilog and SystemVerilog/VERA. Low power RTL techniques. Should have used one of HVL for verification at least for 2 yrs. Conversant with steps involved in verification closure / sign-off. Detailed knowledge of more than one protocol like Ethernet/USB/PCI-Express/AMBA/AHB/AXI. Experience in managing a team of 20 engineers. Excellent problem solving, mentoring and people skills. Scripting Language with PERL, TCL, AWK, shell scripting is a plus. Expert user of industry standard verification tools. Exposure to complete ASIC flow is a major plus.

Qualifications

BE/BTech in EE and or ME/MTech in Electronics and related branches Phd is added bonus Well versed in Perl/Tcl and Unix / Linux presented / published papers in international conferences and journals Participated in learning and development activities at work Energetic and excellent communication skills.

Location: Bangalore Email: info@rv-vlsi.com with Job Title in subject line.
Interested in working at RV-VLSI - Upload Resume

Accounts Administrator

Male Candidates are preferred.
Min Education: BCom.
Exp: 0 to 2 years
Nature of Job
- Expertise in accounting, book keeping, computing and payment collections, TDS, PFS, VAT and Balance sheet, tally and all other accounts related activities.
- Visit to bank and trust office will be part of the job.
- Excellent written and verbal english skills, hard working, good with MSOFFICE team player.

Front Office administrator

Female Candidates are preferred.
Experience: 5 years and above
Education: Any Graduate ---- Preference is Female
Responsible for attending telephone calls and bridging calls efficiently- Excellent communication skill must be able to multi-task and manage stress effectively which is associated with the job. Excellent documentation and filling skills, must be very organized with attention to details. Familiarity with MS word, Spreadsheets and Powerpoint is a major plus. Must have worked in a product company assisting Sr. Management Handle appoints for CEO, Excellent documentation and filling skills must be very organized with attention to details. Must understand the nature of the job and do justice. Good attitude pleasing personality

ASIC Design/Verification Engineer

The successful candidate will be responsible for conducting trainings in front end design and verification, front-end chip implementation including design, implementation, developing verification environment and testcases for ASICS.

Experience

2+ years Design/Verification experience in ASIC or FPGA
Capable of developing test plan from architecture and micro-architecture spec
Building test bench for module level/chip level
Hands on knowledge on chip bus interfaces such as AHB/I2C/USB/PCI and various standard peripherals & interfaces using verilog
Knowledge of System verilog(any HVL) and Scripting languages is a plus.
Excellent verbal and written communication skills and ability to work independently
B.E/B.Tech/ME/MTech in Electronics or related branch

Lead ASIC Design/Implementation Engineer

The successful candidate will be responsible for conducting trainings in front end design, synthesis and static timing analyis. front-end chip implementation including design, implementation and performing timing closure.

Experience

5 plus years Design and Verification experience in ASIC or FPGA
Hands on knowledge on chip bus interfaces such as AHB/I2C/USB/PCI and various standard peripherals & interfaces using verilog
Good fundamentals in RTL design and micro architecture a plus
Strong working knowledge on Synthesis, STA, DFT, BIST and Clocking for complex SoCs in deep-sub micron designs.
Excellent verbal and written communication skills and ability to work independently
Successfully taped out chips
B.E/B.Tech/M.Tech/Phd in Electronics/Electronic Communications