What Decides the Smallest Gate Dimensions Possible? One-Nanometer Gate Dimensions for Transistors May Become a Practical Reality.

An all-star lineup of U.S.-based researchers has laid a legitimate claim to having fabricated one that is at, or at least very near, the top of the list.

With a physical gate length of only one nanometer, this latest transistor, made from a combination of molybdenum disulfide and carbon nanotubes, not only shatters the 20-nm gate length of state-of-the-art transistors currently on the market, but also surpasses the theoretical limit of five nanometers for the gate length of silicon-based transistors. While silicon transistors may stop shrinking by 2021, this research shows that transistors based on nanomaterials may still have some way to go in their miniaturization journey.

In research described in the journal Science, researchers from the U.S. Department of Energy’s Lawrence Berkeley National Laboratory, Stanford University, and the University of Texas at Dallas built their experimental transistor with molybdenum disulfide for the channel material, and single-walled carbon nanotubes as the gate material.

This combination of nanomaterials offers a real benefit over silicon as gate dimensions of transistors shrink. A quick refresher is in order. Transistors consist of three main elements: a source, a gate, and a drain. Charge passes between the source and the drain through the channel. The gate is used to open or close the flow of those charges.

Silicon is actually preferable to molybdenum disulfide as the channel material in most cases, because the electrons flowing through the silicon channel encounter less resistance than they do in molybdenum disulfide. Unfortunately, physics starts to bite back when the gate dimensions get down to five nanometers. It’s at this point that the electrons pull a little quantum trick, tunneling through gate material. The result: The flow of electrons can no longer be turned on and off, and there goes your digital logic capabilities.

But the electrons that were slowed down in molybdenum disulfide, which had been a detriment at dimensions above 5 nm, become a benefit when gate lengths go below those dimensions. This slowing down of electrons in molybdneum disulfide makes them easier to control.

The next issue researchers faced was figuring out what material to use in making the gate. Crafting a gate only 1 nm wide is excruciatingly difficult with traditional lithographic techniques. As a way to bypass that entire issue, the researchers turned to carbon nanotubes.

These Transistors are now at the “proof of concept” stage and have not yet been packed onto a chip and even the self-aligned fabrication schemes for reducing parasitic resistances in the device are yet to be developed. Nonetheless, there is justifiable enthusiasm at what this means for the five-nanometer-gate-width limit.

(Courtesy By Dexter Johnson, IEEE Spectrum)