We all know Moore’s law and we all know transistors are shrinking as per the law. Transistor shrinking has always been the center of attraction among the advancements made in semiconductor technology. Along with transistor shrinking, the advancements in Transistor Interconnect Technology is equally critical to the functional speed of any processer. Every single time there is shrinking it brings in a whole lot of challenges and constraints to the kilometers of copper interconnect wires used in today’s modern Chips and SOCs.
The boost comes in resistivity, a measure of how strongly a material opposes the flow of current. Copper has a very low intrinsic resistivity. But this “bulk property” breaks down as wires get smaller. Electrons bump up against side walls and scatter off grain boundaries, the planar surfaces inside the wire where a copper crystal changes its orientation. The problem is only expected to get worse as copper wiring shrinks further.
A team based at IBM and Global Foundries examined wires that will be needed for chips after the arrival of the 7-nanometer node, a manufacturing stage expected in three or so years. They found indications of a crystal structure that might actually help speed signals and reduce energy consumption in transistor interconnect wires. Electrons are more likely to pass straight through such structures, which would lower the resistivity of the wires.
(Courtesy. Spectrum.ieee.org, Lynne Gignac/IBM)