Advanced Diploma in ASIC Design (ADAD) 


Course Description


Our flagship VLSI program that covers Front-End and Back-End of VLSI in the ASIC and FPGA flow, for engineering graduates looking for dream jobs in VLSI. Students who get admission to this program can apply for jobs in FPGA, ASIC and Full custom Analog product and service companies.


The course builds from core concepts to advanced levels with a good balance of lectures and labs, followed by a live industry relevant project. Conducted by a team of highly dedicated industry professionals  the program is delivered in an industry like atmosphere using Sun cluster grid, thin client technology and industry standard EDA tools and process technologies.



Training Duration and Timings


6 Months Fulltime Program

9:30 am – 5:30 pm, Monday to Friday





Application Fee: INR. 1,500/-

Course Fee (Student):  INR 1,22,500/-

Course Fee (Corporate):  INR 3,67,500/-



Who can benefit from this course?


  • Engineers who want to gain knowledge and experience in VLSI
  • Engineers aspiring for a career in the VLSI domain
  • Engineers who would like to pursue higher studies in India or abroad.
  • Professionals who are looking for a change of domain from IT/BPO to Core companies




Students who have completed their B.E./B.Tech. or M.Tech (with 60% and above in BE, 12th and 10th) from Electronics, Telecommunications, Electrical, Computer Science, Information Technology and Instrumentation Science.



Selection Process


Written test followed by interview (See for further details)



Course Outline


Fundamentals of AMS IC Design

  • Fundamentals of Analog Circuit Design

  • Fundamentals of Logic Design

  • Designing using Verilog, Linux & TCL

  • ASIC Design Flow

  • FPGA Design Flow


Digital Subsystem Design and Verification

  • Advanced RTL Design using Verilog

  • FPGA overview and debug

  • RTL Verification using Verilog


 Implementation and Timing Closure of Digital IC’s for Nanometer Technology

  • Design Synthesis for ASIC methodologies

  • Static Timing Analysis

  • Full custom

  • Automatic Place and Route concepts for Functional blocks and full chip IC’s
    for various package types and IR drop specs

Designing for programmable VLSI systems Live Project

  • Programmable VLSI architectures

  • FPGA design flow

  • HDL techniques for high performance designs intended for programmable logic devices

  • Optimization and timing analysis techniques

  • Building embedded systems with NIOS II soft processor


Core Module

  Review of core VLSI and Digital Design subjects covered in Engineering courses. Students get the opportunity to gain hands on experience using EDA tools to solve design problems in this phase.


Advanced Modules

Building upon phase I this phase introduces students to advanced topics in ASIC and FPGA design, beyond what is normally covered in most regular UG, PG programs. Emphasis is on applying concepts to solve design problems by working on our proprietary designs.

Live Project

Each student takes ownership of a block and is accountable for meeting deadlines, and working with other members in the design team. Students will participate in design reviews and receive regular feedback. Upon successful completion of projects diploma certificate will be awarded. During this phase our faculty take the role of design managers just as in any VLSI company and work with you to hone in your design and soft skills.



In an effort to maintain quality, RV-VLSI reserves the right to change or modify the course content and the duration of the course and the course fees.



A unit of Rashtreeya Sikshana Samiti Trust. All rights reserved, Copyright © RV-VLSI Design Center.