The Quartus II Software Design Series: Debug and Analysis Tools (IDSW135)

 

 

Course Description

 

In this class, you will learn features of the Quartus® II software v. 11.1 that will enable you to analyze and debug your Altera® design. You will get to understand power analysis tools, and other tools like Simultaneous Switching Noise (SSN) Analyzer, SignalTap® II embedded logic analyzer, Signal Probe & the Logic Analyzer Interface. You will learn to analyze and make changes to your design using the Chip Planner.

 

 

Course Fee

 

  • International (Corporate) Fee: $ 495

  • Domestic (Corporate) Fee: INR 5,000

  • Domestic (Student) Fee: INR 3,500

 

For further details contact RV-VLSI

 

In an effort to maintain quality, RV-VLSI reserves the right to change or modify the course content and the duration of the course and the course fees.

 
A unit of Rashtreeya Sikshana Samiti Trust. All rights reserved, Copyright © RV-VLSI Design Center.