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Ninety Three percent of VLSI jobs openings are in the following domains FPGA, ASIC and Embedded Systems. RV-VLSI’s programs prepare for these job openings.
Course material and labs are designed by our experts with decades of industry experience to their credit. Fulltime faculties are industry veterans from USA with many working Silicon parts to their credit. Twenty five percent of the time is spent in theory sessions and seventh five percent in working closely with our experts on industry relevant projects using software tools from Synopsys, Cadence and Mentor Graphics.
We recognize the need for today’s engineers to have the necessary soft-skills like communication and presentation skills, goal setting and time management, email etiquette and team building. These are embedded into the program structure. Regular interactions with our industry faculty will help you transform from an engineer to a professional with a low time to be productive to the industry.
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| ADAD (Advance Diploma in ASIC Design ) |
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| This program offers VLSI training for careers in ASIC and FPGA Design. The course builds from core concepts to advanced levels with a good balance of lectures and labs, followed by a live industry relevant project. Conducted by a team of highly dedicated industry professionals the program is delivered in an industry like atmosphere using Sun cluster grid, thin client technology and industry standard EDA tools from Cadence, Synopsys and Mentor Graphics and Foundry kits from Jazz Semiconductors, USA. | | | | Phase I | | Refresher modules in VLSI and Digital Design concepts covered in Engineering courses. Students get the opportunity to gain hands on experience using EDA tools to solve simple problems in this phase. | | | | Phase II | | Building upon phase I this phase introduces students to advanced topics in ASIC and FPGA design, beyond what is normally covered in most regular UG, PG programs. Emphasis is on applying concepts to solve design problem by working on our proprietary concept labs. | | | | Phase III | | Each student takes ownership of a block and is accountable for meeting deadlines, and working with other members in the design team. Students will participate in design reviews and receive regular feedback from experts and industry professionals. Upon successful completion of projects diploma certificate will be awarded. During this phase our faculty take the role of design managers just as in any VLSI company and work with you to hone in your design skills and soft skills. | | | | Course Contents | | | | Phase I: Foundation Module - 6 Weeks (4 Modules) | - Fundamentals of IC CAD
- Nanometer VLSI design Flow
- Logic design for VLSI Engineers
- Digital design using Verilog
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| | | | Phase II: Design and Application - 7 Weeks (4 modules) | - Digital Design for Synthesis
- Design Verification using Verilog
| - Fundamentals of timing closure for VLSI designs
- Physical Design and Verification for Nanometer technologies
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| | | | Phase III: Live Project - Upto 8 Weeks | The list of projects will be announced midway during the course
- Task assignment to teams
- Daily status meeting to identify issues and explore possible solutions
- Design review and documentation
- Tape out, archiving and documentation
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| | | | In an effort to maintain quality RV-VLSI reserves the right to change, modify the course content and duration. | | | Selection Process: Written test followed by interview. Timing: Fulltime Monday to Friday, Duration(6 months). Application Fee: Rs.1000. | Fee : | | Student : | INR 85,000/- + tax, if applicable. | | Corporates : | INR 1,95,000/- + service tax. | Certification: Advance Diploma in ASIC Design and Engineering upon successful completion of project. | | | | Open House and FREE information sessions every Saturday (4:00PM to 5:30PM) | | | Find out the benefits of taking courses in RV-VLSI, our friendly staff will be there to give you a tour of the facility and answer you questions to help you make an informed decision. To reserve you space for a free information session click here for details
Or call +91-80–40788574. For more details on our new graduate program please call or email mailto:info@rv-vlsi.com | | |
This program is being made possible through a special Training Alliance with TATA ELXSI PVT LTD. Through this alliance, working professionals from TEL are deputed to deliver the course on a fulltime basis for the full duration of the course. This program is designed to make you an Embedded Systems design engineer with a tilt towards software. This course offers the participants theory and practical experience in designing embedded systems and allows them to learn first- hand, solutions to problems encountered in embedded system design. Participants will be working closely with experts on industry projects and learn how professionals solve challenging problems. | | | | The coverage includes the following topics: | - Designing Microcontroller based systems
- RTOS
- C Programming
- System software and tool chain
- Embedded Operating System
- Device Drivers
- Project Work: Using microcontrollers and ARM processor based systems.
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| | | Total duration of the course is 400 hours out of which 200 hours are allocated for the elective module. The elective module will consist of industry relevant project work and associated specialized theory. | | | | Key differentiators for this course are: | - Taught by working professionals from industry with decades of industry experience.
- The course is a true embedded course with a product perspective.
- Aligned to industry requirements.
- 50% of time spent on hands -on experience on latest technologies.
- The course material is supported by good infrastructure in terms of HW boards and development tool chain.
- Live industry problems are used for project work.
- Elective modules give the participants a choice to select relevant, focused, domain specific training based on their skills and desire to work in a specific domain.
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| In an effort to maintain quality, RV-VLSI reserves the right to change, modify the course content and the duration of the course and the course fees. | | | Selection Process: Written test followed by interview. Application Fee: Rs.1000. | Fee : | | Student : | INR 65,000/- + tax, if applicable. | | Corporates : | INR 1,30,000/- + service tax. | Timing: Fulltime Monday to Friday, Duration(5 months). |
Find out the benefits of taking courses in RV-VLSI; our friendly staff will be there to give you a tour of the facility and answer your questions to help you make an informed decision. To reserve you space for a free information session click here for details
Or call +91-80-40788574. For more details on our new graduate program please call or email mailto:info@rv-vlsi.com |
| Diploma in Digital Design and Verification (FPGA/ASIC Frontend) |
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| This program is design for students who are pursuing a career in RTL design and Verification. The course covers the various topics in design and verification starting from basic concepts to advanced techniques used by the industry today. | The course is designed keeping in mind the requirements of the industry with the use industry standard software tools for lab and projects.
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| | Theory: 100 hours | Labs and Project: 400 hours | | Fee : | | Student : | INR 45,000/- + tax, if applicable. | | Corporates : | INR 80,000/- + service tax. | |
| Diploma in VLSI Physical Design ( ASIC Backend) |
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| This program is designed for students desirous of pursuing a career in ASIC Physical design. The course covers fundamental concepts in layout design covering the full custom and ASIC design methodologies. Special coverage to topics such as DFM, Parasitic extraction, signal integrity issues, and layout optimization techniques commonly used in the industry to address yield and performance issues are covered. This course incorporates all the standard EDA tools used in the industry and is taught by professionals with decades of industry experience and many successful tape outs to their credit. |
| | Theory: 100 hours | Labs and Project: 400 hours | | Fee : | | Student : | INR 45,000/- + tax, if applicable. | | Corporates : | INR 1,25,000/- + service tax. | |
| ICLE (Certificate in Custom Layout Engineering): |
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This program offers IC Layout engineering training enabling students to gain mastery and technical expertise in this specialized area. The course covers all aspects of IC Layout engineering, starting from electrical concepts to advanced topics in deep sub micron, as appropriate for layout design. Conducted by industry professionals, the program is delivered in an industry like Atmosphere using Sun Solaris/Linux machines and industry standard EDA tools from Cadence and Mentor Graphics and Foundry kits from Jazz Semiconductors, USA.
A good balance of lectures and labs, followed by live projects ensures a highly interactive learning experience. | | | | COURSE CONTENTS: 8 Weeks | - Fundamentals of IC CAD
- Nanometer VLSI Design Flows
- Introduction in Layout editors and process design kits (PDK's)
- High Performance Layout optimization techniques
- Physical Verification and parasitic extraction
- DFM, ESD and LUP· Technology Migration
- Project Work
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Selection Process: Written test and interview. Timings: Monday to Friday 10.00am to 6.00pm (Full time) Duration 8 weeks Application Fee: Rs.1000. | Fee : | | Student : | INR 45,000/- + tax, if applicable. | | Corporates : | INR 90,000/- + service tax. | Find out the benefits of taking courses in RV-VLSI, our friendly staff will be there to give you a tour of the facility and answer you questions to help you make an informed decision. To reserve you space for a free information session click here for details
Or call +91-80-40788574. | For more details on our new graduate program please call or email mailto:info@rv-vlsi.com | | |
| | Short refresher courses in VLSI design are offered to working professionals and change of track IT professionals through our short module programs. The duration of the module varies from one to two weeks and depends on the specific module. Theory sessions are held during morning hours and the lab assignments can be completed anytime during the week or on Saturdays.
Whether you are looking for a lateral change, want to upgrade your knowledge or are looking for a career change from IT/BPO to VLSI short modules are a great option to learn while keeping your job.
Industry standard tools, well designed and structured courseware, expert faculties with decades of industry experience conduct these modules. | | | | Module1: Fundamentals of VLSI CAD | | Students will learn the VLSI CAD environment in which chips are designed. This module covers the most frequently used linux/Unix commands, introduction to text editors and scripting using shell and perl. A unique feature of this module are the lab assignments. The scripts you write during this module will be used in later modules. You will gain first hand experience in applying theory in a practical manner. |
| | Theory: 18 hours | Labs and Projects: 50 hours | | Fee : | | Student : | INR 9,000/- + tax, if applicable. |
| | Corporates : | INR 27,000/- + service tax. | | | | | | Module2: Nanometer VLSI Design Concepts | | This module covers the design concepts used in VLSI digital design. This module is a must for anyone aspiring to get a job in VLSI. It covers the fundamental concepts involved in designing a chip from Spec to gds. This course is taught by experts, practical examples from their experience are used to help you understand the concepts and apply them to solve problems. |
| | Theory: 18 hours | Concept labs: 50 Hours | | Fee : | | Student : | INR 4,500/- + tax, if applicable. |
| | Corporates : | INR 13,500/- + service tax. | | | | | | Module 3: Logic design for VLSI Engineers | | Digital VLSI design requires a good understanding of Logic design fundamentals. The module revisits the fundaments of Digital logic design, FSM's and logic optimization techniques. The course is taught by industry experts. Practical examples based on industry experience of the faculty member will be used to explain the theory followed by lab assignments. |
| | Theory: 10 hours | Concept Labs: 25 hours | | Fee : | | Student : | INR 4,500/- + tax, if applicable. |
| | Corporates : | INR 13,500/- + service tax. | | | | | | Module 4: Digital design using Verilog | | Verilog is the preferred language used for design entry. This module covers the verilog constructs used in RILL designing. Best practices used in coding to ensure testability and synthesizability is covered. This module is a must if you aspire a career in front-end VLSI design. After completion of this module you will be familiar with the RILL design flow, verilog RILL coding and simulation. Industry professionals with decades of industry experience handle this module. |
| | Theory: 20 hours | Concept Labs: 50 hours | | Fee : | | Student : | INR 9,000/- + tax, if applicable. |
| | Corporates : | INR 30,000/- + service tax. | | | | | | Module 5: Design Verification using Verilog | | RILL Verification is a hot area today with a lot of job openings. Verification of the design with good coverage is a bottleneck today. This module covers the RILL verification flow, the need for verification, plan, test bench creation, regression testing, common challenges faced in verification and introduction to high level verification languages. |
| | Theory: 20 hours | Mini Projects: 50 hours | | Fee : | | Student : | INR 9,000/- + tax, if applicable. |
| | Corporates : | INR 35,000/- + service tax. | | | | | | Module 6: Digital Design For Synthesis | | The next design step in VLSI design after RILL design and verification is synthesis. The challenges today are with respect to area, power and timing. This module covers in detail the design implementation phase and touches upon the various techniques used to address the issues with power, testability and timing closure. Industry standard tools are used to illustrate the various steps and techniques used by professionals to resolve errors. |
| | Theory: 10 hours | Mini Projects: 25 hours | | Fee : | | Student : | INR 4,500/- + tax, if applicable. |
| | Corporates : | INR 20,000/- + service tax. | | | | | | Module 7: Fundamentals of timing closure for VLSI designs | | Design synthesis is an iterative process and involves targeting the RILL to a specific foundry process technology. This module deals with the challenges faced in closing timing on a design. Industry standard static timing analysis tools are used to run timing analysis on designs and analyze the timing reports to solve timing errors. |
| | Theory: 20 hours | Mini Projects: 50 hours | | Fee : | | Student : | INR 9,000/- + tax, if applicable. |
| | Corporates : | INR 35,000/- + service tax. | | | | | | Module 8: Physical Design and Verification for Nanometer technologies | | VLSI physical design involves the process of creating a layout of a complex digital circuit comprising of logic gates, memories, analog blocks and macros. Layouts are generated using automatic place and route tools using a verilog gate level netlist as input. This module follows after module 7. The physical design flow in this module covers floorplanning, Placement, clock tree synthesis, Routing, DRC, DFM and parasitic extraction. To attend this module, module 2 and module 7 are prerequisites. |
| | Theory: 10 hours | Mini Projects: 50 hours | | Fee : | | Student : | INR 9,000/- + tax, if applicable. |
| | Corporates : | INR 40,000/- + service tax. | | | | | | |
| VLSI core subjects are taught to students during their engineering from third semester onwards. RV-VLSI has developed new course modules specifically for students who are still in their colleges. Through a series of boot camps one can augment his academic knowledge with a practical application of it by attending these boot camps. These boot camps are currently offered to Engineering Colleges who have a special arrangement with RV-VLSI. | | | If you are a faculty from a college and would like to get more information about our boot camps, please contact info@rv-vlsi.com
| If you are from the industry and would like us to help you with your university programs for colleges please contact info@rv-vlsi.com
Currently the following Boot camps are offered: - Logic Design for VLSI Engineers
- CAD for VLSI Engineers
- Verilog for VLSI Engineers
- PERL for VLSI Engineers
- Making of Nanometer VLSI chips
- ASIC Implementation of VLSI chips RTL to GDS
- Analog Design Techniques for VLSI Engineers
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| Corporate Training Programs |
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- Our programs are designed to meet or exceed the high standards set by the semiconductor industry. Our facilities are designed to recreate the look and feel of the industry and is well equipped with the industry standard tools from companies like Synopsys, Mentor Graphics and Cadence.
- The center is geared to handle your corporate training needs from 8 students to 96 students at a time.
- Expert full time faculty with extensive industry experience handle the programs be it in System Verilog or Physical Verification and MASKCAD.
- Please call us and we will be happy to understand your requirements and design a program that suites your needs
Find out the benefits of taking courses in RV-VLSI: our friendly staff will be there to give you a tour of the facility and answer you questions to help you make an informed decision. To reserve you space for a free information session click here for details
Or call +91-80-40788574 For more details on our new graduate program please call or email mailto:info@rv-vlsi.com
| BE Projects for eighth semester students |
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| RV-VLSI in discussion with VTU has arrived at the following list of BE projects for eighth semester engineering students
of colleges affiliated to VTU, Belgaum. These projects have be decided based on industry relevance. Each student who enroles in these projects will be interacting with industry professionals who bring with them decades of industry experience and rich tapeout experience critical to execute the projects like the
way its done in the industry. | | Important Dates:
| | Feb 1st to Feb 28th | Pre project training | | March 1st to April 30th | Project execution | | May 1st to May 10th | Report Preparation | | | | Eligilibility: | | Eight semester students interested in VLSI and Embedded Systems domain from the following branches: | | Electronics and Communications | | Telecommunications | | Electrical and Electronics | | Computer Science | | Information Science | | Instrumentation Technology | | | | RV-VLSI reserves the right to admission. | | Domains: | | VLSI | ASIC Front End of IP commonly used in mobile phones, laptops, desktops and interfaces/peripherals | | Embedded Systems | Telecommunications (Wireless and Wireline)
IPNetworking
Device Driver Development (Ex: Ethernet)
Network Management | | | | Intake: | 170 students | | Projects List : | click here | | | | Fees: | Pre-project training Rs. 6,000/- per students ( 4 students per project)
Project execution FREE and may be carried out at your college subject to necessary permissions from college authorities | | | | | Queries : | Contact 080-40-788574 Mr. Arvind Rao or Mrs. Archana or email info@rv-vlsi.com | |
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A unit of Rashtreeya Sikshana Samiti Trust. |
All rights reserved, Copyright © RV-VLSI Design Center. |
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